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HWD4863 Dual 2.2W Audio Amplifier Plus Stereo Headphone Function
HWD4863 Dual 2.2W Audio Amplifier Plus Stereo Headphone Function
General Description
TheHWD4863 is a dual bridge-connected audio power amplifier which, when connected to a 5V supply, will deliver 2.2W to a 4 load (Note 1) or 2.5W to a 3 load (Note 2) with less than 1.0% THD+N. In addition, the headphone input pin allows the amplifiers to operate in single-ended mode when driving stereo headphones. Boomer audio power amplifiers were designed specifically to provide high quality output power from a surface mount package while requiring few external components. To simplify audio system design, theHWD4863 combines dual bridge speaker amplifiers and stereo headphone amplifiers on one chip. TheHWD4863 features an externally controlled, low-power consumption shutdown mode, a stereo headphone amplifier mode, and thermal shutdown protection. It also utilizes circuitry to reduce "clicks and pops" during device turn-on.
Note 1: AnHWD4863MTE or HWD4863LQ that has been properly mounted to a circuit board will deliver 2.2W into 4. The other package options for the HWD4863 will deliver 1.1W into 8. See the Application Information sections for further information concerning theHWD4863MTE and HWD4863LQ. Note 2: AnHWD4863MTE or HWD4863LQ that has been properly mounted to a circuit board and forced-air cooled will deliver 2.5W into 3.
Key Specifications
n PO at 1% THD+N n HWD4863LQ, 3, 4 loads 2.5W(typ), 2.2W(typ) n HWD4863MTE, 3, 4 loads 2.5W(typ), 2.2W(typ) n HWD4863MTE, 8 load 1.1W(typ) n HWD4863, 8 1.1W(typ) n Single-ended mode THD+N at 75mW into 32 0.5%(max) n Shutdown current 0.7A(typ) n Supply voltage range 2.0V to 5.5V
Features
n n n n n Stereo headphone amplifier mode "Click and pop" suppression circuitry Unity-gain stable Thermal shutdown protection circuitry SOIC, DIP, TSSOP and exposed-DAP TSSOP and LLP packages
Applications
n Multimedia monitors n Portable and desktop computers n Portable televisions
Typical Application
Note: Pin out shown for DIP and SO packages. Refer to the Connection Diagrams for the pinout of the TSSOP, Exposed-DAP TSSOP, and Exposed-DAP LLP packages.
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Connection Diagrams
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Top View Order Number HWD4863M, HWD4863N See HWD Package Number M16B for SO See HWD Package Number N16E for DIP
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Top View Order Number HWD4863MT See HWD Package Number MTC20 for TSSOP
01288102
Top View Order Number HWD4863MTE See HWD Package Number MXA20A for Exposed-DAP TSSOP
01288130
Top View Order Number HWD4863LQ See HWD Package Number LQA24A for Exposed-DAP LLP
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Absolute Maximum Ratings
(Note 3)
JC (typ) -- M16B JA (typ) -- M16B JC (typ) -- N16A JA (typ) -- N16A
20C/W 80C/W 20C/W 63C/W 20C/W 80C/W 2C/W 41C/W (Note 7) 51C/W (Note 8) 90C/W(Note 9) 3.0C/W 42C/W (Note 10)
Supply Voltage Storage Temperature Input Voltage Power Dissipation (Note 4) ESD Susceptibility(Note 5) ESD Susceptibility (Note 6) Junction Temperature Solder Information Small Outline Package Vapor Phase (60 sec.) Infrared (15 sec.)
6.0V -65C to +150C -0.3V to VDD +0.3V Internally limited 2000V 200V 150C
JC (typ) -- MTC20 JA (typ) -- MTC20 JC (typ) -- MXA20A JA (typ) -- MXA20A JA (typ) -- MXA20A JA (typ) -- MXA20A JC (typ) -- LQ24A JA (typ) -- LQ24A
215C 220C
Operating Ratings
Temperature Range TMIN TA TMAX Supply Voltage -40C TA 85C 2.0V VDD 5.5V
See AN-450 "Surface Mounting and their Effects on Product Reliablilty" for other methods of soldering surface mount devices. Thermal Resistance
Electrical Characteristics for Entire IC (Notes 3, 11)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25C. Symbol Parameter Conditions HWD4863 Typical (Note 12) VDD IDD Supply Voltage Quiescent Power Supply Current VIN = 0V, IO = 0A (Note 14), HP-IN = 0V VIN = 0V, IO = 0A (Note 14), HP-IN = 4V ISD VIH VIL Shutdown Current Headphone High Input Voltage Headphone Low Input Voltage VDD applied to the SHUTDOWN pin 11.5 5.8 0.7 2 4 0.8 Limit (Note 13) 2 5.5 20 6 V (min) V (max) mA (max) mA (min) mA A (min) V (min) V (max) Units (Limits)
Electrical Characteristics for Bridged-Mode Operation (Notes 3, 11)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions HWD4863 Typical (Note 12) VOS PO Output Offset Voltage Output Power (Note 15) VIN = 0V THD+N = 1%, f = 1kHz (Note 16) HWD4863MTE, R L = 3 HWD4863LQ, RL = 3 HWD4863MTE, RL = 4 HWD4863LQ, RL = 4 HWD4863, RL = 8 THD+N = 10%, f = 1kHz (Note 16) HWD4863MTE, R L = 3 HWD4863LQ, R L = 3 3.2 3.2 W W 5 2.5 2.5 2.2 2.2 1.1 1.0 Limit (Note 13) 50 Units (Limits)
mV (max) W W W W W (min)
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Electrical Characteristics for Bridged-Mode Operation (Notes 3, 11)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions Typical (Note 12) HWD4863MTE, RL = 4 HWD4863LQ, RL = 4 HWD4863, RL = 8 THD+N = 1%, f = 1kHz, RL = 32 THD+N Total Harmonic Distortion+Noise 20Hz f 20kHz, AVD = 2 HWD4863MTE, R L = 4, PO = 2W HWD4863LQ, R L = 4, PO = 2W HWD4863, R L = 8, PO = 1W PSRR XTALK SNR Power Supply Rejection Ratio Channel Separation Signal To Noise Ratio VDD = 5V, VRIPPLE = 200mVRMS, RL = 8, CB = 1.0F f = 1kHz, CB = 1.0F VDD = 5V, PO = 1.1W, RL = 8 2.7 2.7 1.5 0.34 0.3 0.3
(Continued) Units (Limits)
HWD4863 Limit (Note 13)
W W W W %
0.3 67 90 98
% dB dB dB
Electrical Characteristics for Single-Ended Operation (Notes 3, 4)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions HWD4863 Typical (Note 12) VOS PO Output Offset Voltage Output Power VIN = 0V THD+N = 0.5%, f = 1kHz, RL = 32 THD+N = 1%, f = 1kHz, RL = 8 THD+N = 10%, f = 1kHz, RL = 8 THD+N PSRR XTALK SNR Total Harmonic Distortion+Noise Power Supply Rejection Ratio Channel Separation Signal To Noise Ratio AV = -1, PO = 75mW, 20Hz f 20kHz, RL = 32 CB = 1.0F, VRIPPLE = 200mV f = 1kHz f = 1kHz, CB = 1.0F VDD = 5V, PO = 340mW, RL = 8
RMS,
Limit (Note 13) 50 75
Units (Limits)
5 85 340 440 0.2 52 60 95
mV (max) mW (min) mW mW % dB dB dB
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 4: The maximum power dissipation is dictated by TJMAX, JA, and the ambient temperature TA and must be derated at elevated temperatures. The maximum allowable power dissipation is PDMAX = (TJMAX - T A)/JA. For the HWD4863, TJMAX = 150C. For the JAs for different packages, please see the Application Information section or the Absolute Maximum Ratings section. Note 5: Human body model, 100 pF discharged through a 1.5 k resistor. Note 6: Machine model, 220 pF-240 pF discharged through all pins. Note 7: The given JA is for an HWD4863 packaged in an MXA20A with the exposed-DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. Note 8: The given JA is for an HWD4863 packaged in an MXA20A with the exposed-DAP soldered to an exposed 1in2 area of 1oz printed circuit board copper. Note 9: The given JA is for an HWD4863 packaged in an MXA20A with the exposed-DAP not soldered to printed circuit board copper. Note 10: The given JA is for an HWD4863 packaged in an LQA24A with the exposed-DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. Note 11: All voltages are measured with respect to the ground (GND) pins unless otherwise specified. Note 12: Typicals are measured at 25C and represent the parametric norm. Note 13: Limits are guaranteed to HWD's AOQL (Average Outgoing Quality Level). Note 14: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier. Note 15: Output power is measured at the device terminals. Note 16: When driving 3 or 4 and operating on a 5V supply, the HWD4863LQ andHWD4863MTE must be mounted to the circuit board that has a minimum of 2.5in2 of exposed, uninterrupted copper area connected to the LLP package's exposed DAP.
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Typical Performance Characteristics MTE Specific Characteristics
HWD4863MTE THD+N vs Output Power HWD4863MTE THD+N vs Frequency
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01288199
HWD4863MTE THD+N vs Output Power
HWD4863MTE THD+N vs Frequency
01288196
01288198
HWD4863MTE Power Dissipation vs Power Output
HWD4863MTE Power Derating Curve
01288190 01288195
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Typical Performance Characteristics MTE Specific Characteristics (Continued)
HWD4863MTE (Note 17) Power Derating Curve
01288137
Note 17: This curve shows the HWD4863MTE's thermal dissipation ability at different ambient temperatures given these conditions: 500LFPM + JEDEC board: The part is soldered to a 1S2P 20-lead exposed-DAP TSSOP test board with 500 linear feet per minute of forced-air flow across it. Board information - copper dimensions: 74x74mm, copper coverage: 100% (buried layer) and 12% (top/bottom layers), 16 vias under the exposed-DAP. 500LFPM + 2.5in2: The part is soldered to a 2.5in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it. 2.5in2: The part is soldered to a 2.5in2, 1oz. copper plane. Not Attached: The part is not soldered down and is not forced-air cooled.
Non-MTE Specific Characteristics
THD+N vs Frequency THD+N vs Frequency
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THD+N vs Frequency
THD+N vs Output Power
01288105
01288106
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Non-MTE Specific Characteristics
THD+N vs Output Power
(Continued) THD+N vs Output Power
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01288108
THD+N vs Output Power
THD+N vs Frequency
01288187
01288189
THD+N vs Output Power
THD+N vs Frequency
01288186
01288188
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Non-MTE Specific Characteristics
Output Power vs Load Resistance
(Continued) Power Dissipation vs Supply Voltage
01288184 01288185
Output Power vs Supply Voltage
Output Power vs Supply Voltage
01288109
01288110
Output Power vs Supply Voltage
Output Power vs Load Resistance
01288111
01288112
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Non-MTE Specific Characteristics
Output Power vs Load Resistance
(Continued) Power Dissipation vs Output Power
01288113
01288114
Dropout Voltage vs Supply Voltage
Power Derating Curve
01288116 01288115
Power Dissipation vs Output Power
Noise Floor
01288117
01288118
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Non-MTE Specific Characteristics
Channel Separation
(Continued) Channel Separation
01288119
01288120
Power Supply Rejection Ratio
Open Loop Frequency Response
01288121
01288122
Supply Current vs Supply Voltage
01288123
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External Components Description
(Refer to Figure 1.) Components 1. 2. Ri Ci Functional Description The Inverting input resistance, along with Rf, set the closed-loop gain. Ri, along with Ci, form a high pass filter with fc = 1/(2RiCi). The input coupling capacitor blocks DC voltage at the amplifier's input terminals. Ci, along with Ri, create a highpass filter with fc = 1/(2RiCi). Refer to the section, SELECTING PROPER EXTERNAL COMPONENTS, for an explanation of determining the value of Ci. The feedback resistance, along with Ri, set the closed-loop gain. The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for information about properly placing, and selecting the value of, this capacitor. The capacitor, CB, filters the half-supply voltage present on the BYPASS pin. Refer to the SELECTING PROPER EXTERNAL COMPONENTS section for information concerning proper placement and selecting CB's value. level without forced air cooling. In all circumstances and conditions, the junction temperature must be held below 150C to prevent activating the HWD4863's thermal shutdown protection. The HWD4863's power de-rating curve in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts for the exposed-DAP TSSOP and LLP packages are shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an LLP package is available from Chengdu SinoMicroelectronics package Engineering Group. When contacting them, ask for 'Preliminary Application Note for the Assembly of the LLP Package on a Printed Circuit Board, Revision A dated 7/14/00.' PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3 AND 4 LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1 trace resistance reduces the output power dissipated by a 4 load from 2.1W to 2.0W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing.
3. 4. 5.
Rf Cs CB
Application Information
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The HWD4863's exposed-DAP (die attach paddle) packages (MTE and LQ) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio power amplifier that produces 2.2W at 1% THD with a 4 load. This high power is achieved through careful consideration of necessary thermal design. Failing to optimize thermal design may compromise the HWD4863's high power performance and activate unwanted, though necessary, thermal shutdown protection. The MTE and LQ packages must have their DAPs soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with 32(4x8) (MTE) or 6(3x2) (LQ) vias. The via diameter should be 0.012in - 0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4 load. Heatsink areas not placed on the same PCB layer as the HWD4863 should be 5in2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25c ambient temperature. Increase the area to compensate for ambient temperatures above 25c. In systems using cooling fans, the HWD4863MTE can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a 2.5in2 exposed copper or 5.0in2 inner layer copper plane heatsink, theHWD4863MTE can continuously drive a 3 load to full power. The HWD4863LQ achieves the same output power
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Application Information
(Continued)
* Refer to the section Proper Selection of External Components, for a detailed discussion of CB size.
FIGURE 1. Typical Audio Amplifier Application Circuit Pin out shown for DIP and SO packages. Refer to the Connection Diagrams for the pinout of the TSSOP, Exposed-DAP TSSOP, and Exposed-DAP LLP packages. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 1, the HWD4863 consists of two pairs of operational amplifiers, forming a two-channel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies equally to channel B.) External resistors Rf and Ri set the closed-loop gain of Amp1A, whereas two internal 20k resistors set Amp2A's gain at -1. The HWD4863 drives a load, such as a speaker, connected between the two amplifier outputs, -OUTA and +OUTA. Figure 1 shows that Amp1A's output serves as Amp2A's input. This results in both amplifiers producing signals identical in magnitude, but 180 out of phase. Taking advantage of this phase difference, a load is placed between -OUTA and +OUTA and driven differentially (commonly referred to as 'bridge mode'). This results in a differential gain of (1) AVD = 2 x (Rf / Ri) Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. This produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the Audio Power Amplifier Design section. Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation (2) states the maximum power dissipation point for a singleended amplifier operating at a given supply voltage and driving a specified output load (2) PDMAX = (VDD)2 / (22 RL) Single-Ended However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The HWD4863 has two operational amplifiers per channel. The maximum internal power dissipation per channel operating in the bridge mode is four times that of a single-ended amplifier. From Equation (3), assuming a 5V power supply and an 4 load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo operation. (3) PDMAX = 4 x (VDD)2 / (22 RL) Bridge Mode The HWD4973's power dissipation is twice that given by Equation (2) or Equation (3) when operating in the single-ended
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Application Information
(Continued)
mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation (3) must not exceed the power dissipation given by Equation (4): (4) PDMAX' = (TJMAX - TA) / JA The HWD4863's JMAX = 150C. In the LQ (LLP) package T soldered to a DAP pad that expands to a copper area of 5in2 on a PCB, the HWD4863's JA is 20C/W. In the MTE package soldered to a DAP pad that expands to a copper area of 2in2 on a PCB , theHWD4863's is 41C/W. At any given JA ambient temperature TJ\A, use Equation (4) to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation (4) and substituting PDMAX for PDMAX' results in Equation (5). This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the HWD4863's maximum junction temperature. (5) TA = TJMAX - 2 x PDMAX JA For a typical application with a 5V power supply and an 4 load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 99C for the LLP package and 45C for the MTE package. (6) TJMAX = PDMAX JA + TA Equation (6) gives the maximum junction temperature TJMAX. If the result violates the HWD4863's 150C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is a surface mount part operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. If the result of Equation (2) is greater than that of Equation (3), then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to reduce JA. The heat sink can be created using additional copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the JA is the sum of JC, CS, and SA. (JC is the junction-to-case thermal impedance, CS is the case-to-sink thermal impedance, and SAis the sink-to-ambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10F in parallel with a 0.1F filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 1.0F tantalum bypass capacitance connected between the HWD4863's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation in the output signal. Keep the length of leads and traces that connect capacitors between the HWD4863's power supply pin and ground as short as possible. Connecting a
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1F capacitor, CB, between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turn-on time and can compromise amplifier's click and pop performance. The selection of bypass capacitor values, especially CB, depends on desired PSRR requirements, click and pop performance (as explained in the section, Proper Selection of External Components), system cost, and size constraints. MICRO-POWER SHUTDOWN The voltage applied to the SHUTDOWN pin controls the HWD4863's shutdown function. Activate micro-power shutdown by applying VDD to the SHUTDOWN pin. When active, the HWD4863's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low 0.7A typical shutdown current is achieved by applying a voltage that is as near as VDD as possible to the SHUTDOWN pin. A voltage thrat is less than VDD may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 10k pull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to VDD through the pull-up resistor, activating micro-power shutdown. The switch and resistor guarantee that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull up resistor. TABLE 1. Logic level truth table for SHUTDOWN and HP-IN Operation SHUTDOWN Low Low High High HP-IN PIN logic Low logic High logic Low logic High OPERATIONAL MODE Bridged amplifiers Single-Ended amplifiers Micro-power Shutdown Micro-power Shutdown
HP-IN FUNCTION Applying a voltage between 4V and VDD to the HWD4863's HP-IN headphone control pin turns off Amp2A and Amp2B, muting a bridged-connected load. Quiescent current consumption is reduced when the IC is in this single-ended mode. Figure 2 shows the implementation of the HWD4863's headphone control function. With no headphones connected to the headphone jack, the R1-R2 voltage divider sets the voltage applied to the HP-IN pin (pin 16) at approximately 50mV. This 50mV enables Amp1B and Amp2B, placing the HWD4863's in bridged mode operation. The output coupling capacitor blocks the amplifier's half-supply DC voltage, protecting the headphones. While the HWD4863 operates in bridged mode, the DC potential across the load is essentially 0V. The HP-IN threshold is set at 4V. Therefore, even in an ideal situation, the output swing cannot cause a false single-ended trigger. Connecting headphones to the headphone jack disconnects the head-
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Application Information
(Continued)
sents a tradeoff: as the size of CB increases, the turn-on time increases. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turn-on times for various values of CB: CB 0.01F 0.1F 0.22F 0.47F 1.0F TON 20 ms 200 ms 440 ms 940 ms 2 Sec
without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates maximum power dissipation as explained above in the Power Dissipation section. After satisfying the HWD4863's power dissipation requirements, the minimum differential gain is found using Equation (10).
(10) Thus, a minimum gain of 2.83 allows the HWD4863's to reach full output swing and maintain low noise and THD+N performance. For this example, let AVD = 3. The amplifier's overall gain is set using the input (Ri) and feedback (Rf) resistors. With the desired input impedance set at 20k, the feedback resistor is found using Equation (11). (11) Rf/Ri = AVD/2 The value of Rf is 30k. The last step in this design example is setting the amplifier's -3dB frequency bandwidth. To achieve the desired 0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the 0.25dB desired limit. The results are an (12) fL = 100Hz/5 = 20Hz and an (13) FH = 20kHzx5 = 100kHz As mentioned in the External Components section, Ri and Ci create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the coupling capacitor's value using Equation (12).
In order eliminate 'clicks and pops', all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause 'clicks and pops'. In a single-ended configuration, the output is coupled to the load by COUT. This capacitor usually has a high value. COUT discharges through internal 20k resistors. Depending on the size of COUT, the discharge time constant can be relatively large. To reduce transients in single-ended mode, an external 1k - 5k resistor can be placed in parallel with the internal 20k resistor. The tradeoff for using this resistor is increased quiescent current. NO LOAD STABILITY TheHWD4863 may exhibit low level oscillation when the load resistance is greater than 10k. This oscillation only occurs as the output signal swings near the supply voltages. Prevent this oscillation by connecting a 5k between the output pins and ground. AUDIO POWER AMPLIFIER DESIGN Audio Amplifier Design: Driving 1W into an 8 Load The following are the desired operational parameters: Power Output: Load Impedance: Input Level: Input Impedance: Bandwidth: 1Wrms 8 1Vrms 20k 100Hz-20 kHz 0.25 dB
the result is (14) 1/(2*20k*20Hz) = 0.398F Use a 0.39F capacitor, the closest standard value. The product of the desired high frequency cutoff (100kHz in this example) and the differential gain, AVD, determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 300kHz. This is less than the HWD4863's 3.5MHz GBWP. With this margin, the amplifier can be used in designs that require more differential gain while avoiding performance-lrestricting bandwidth limitations. RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT Figures 3 through 6 show the recommended two-layer PC board layout that is optimized for the 20-pin MTE-packaged HWD4863 and associated external components. Figures 7 through 11 show the recommended four-layer PC board layout that is optimized for the 24-pin LQ-packaged HWD4863 and associated external components. These circuits are designed for use with an external 5V supply and 4 speakers. These circuit boards are easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect 4 speakers between the board's -OUTA and +OUTA and OUTB and +OUTB pads.
The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical Performance Characteristics section. Another way, using Equation (4), is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance Characteristics curves, must be added to the result obtained by Equation (8). The result in Equation (9).
(8) (9) VDD (VOUTPEAK + (VODTOP + VODBOT)) The Output Power vs Supply Voltage graph for an 8 load indicates a minimum supply voltage of 4.6V. This is easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom, allowing the HWD4863 to produce peak output power in excess of 1W
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HWD4863
Application Information
(Continued)
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FIGURE 8. Recommended LQ PC board layout: Component-side layout
FIGURE 10. Recommended LQ PC board layout: lower inner-layer layout
01288135 01288133
FIGURE 9. Recommended LQ PC board layout: upper inner-layer layout
FIGURE 11. Recommended LQ PC board layout: bottom-side layout
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HWD4863
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Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead (0.300" Wide) Molded Small Outline Package, JEDEC Order Number HWD4863M HWD Package Number M16B
16-Lead (0.300" Wide) Molded Dual-In-Line Package Order Number HWD4863N HWD Package Number N16E
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HWD4863
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Molded PKG, TSSOP, JEDEC, 4.4mm BODY WIDTH Order Number HWD4863MT HWD Package Number MTC20
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HWD4863
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Molded TSSOP, Exposed Pad, 6.5x4.4x0.9mm Order Number HWD4863MTE HWD Package Number MXA20A
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
24-Lead Molded pkg, Leadframe Package LLP Order Number HWD4863LQ HWD Package Number LQA24A
LIFE SUPPORT POLICY HWD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF CHENGDU SINO MICROELECTRONICS CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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